Address range decode using CASE statement in VHDL

-- Type decleration
SUBTYPE sram_dev_addr IS INTEGER RANGE 16#100000# TO 16#13FFFF#;
SUBTYPE ctrl_reg_addr IS INTEGER RANGE 16#1FC000# TO 16#1FFFFF#;

-- Address decoding process
proc_access_decode : PROCESS (clk_80m)
VARIABLE own_addr_var : INTEGER RANGE 0 TO 16#1FFFFF#;
VARIABLE dev_sel : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00";

BEGIN
-- type convert the input proc_addr
own_addr_var := conv_integer (UNSIGNED (proc_addr)) ;
CASE own_addr_var IS
WHEN sram_dev_addr => dev_sel := "01";
WHEN ctrl_reg_addr => dev_sel := "10";
WHEN OTHERS => dev_sel := "11";
END CASE;
END PROCESS proc_access_decode;

Delete unwanted whitespaces

VIM Command to delete unwanted whitespaces at the end of line in a file.

:%s/\s*$//

RANGE DECLERATION IN VHDL

Range cannot be declared for STD_LOGIC_VECTOR types.


CONSTANT ARINC1_ADDR_RNG_L : STD_LOGIC_VECTOR (22 DOWNTO 2) := '1' & X"F0000" ;
CONSTANT ARINC1_ADDR_RNG_H : STD_LOGIC_VECTOR (22 DOWNTO 2) := '1' & X"F1FFF" ;

TYPE ARINC1_ADDR_RNG IS RANGE ARINC1_ADDR_RNG_L TO ARINC1_ADDR_RNG_H ;

Hint: Range must be a scalar type.

An useful way to avoid Zero simulation time warning in Modelsim

You could have noticed few simulation warnings at 0 ns time in Modelsim. Normally therse warnings are not a useful one. Though there is a switch available for NC simulator (ncsim -messages -NOTIMEZEROASRTMSG), I could not find a similar one for Modelsim (especially 5.7g which I use). Here is the trick to avoid it in Modelsim.

quietly set StdArithNoWarnings 1
run 0 ns
quietly set StdArithNoWarnings 0
run -all

Replace more than 2 spaces by newline in Vim

:%s/ \s*/^M/gc

To get ^M, press ^Q and ^M in vim. i.e. Press visual block key followed by ctrl m.

INTEGER to STD_LOGIC_VECTOR

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

conv_std_logic_vector (integer, std_logic_vector_width);

File Decleration difference between VHDL-87 and VHDL-93

http://www.vdlande.com/VHDL/filedec.html

What is wrong in this VHDL code?

ENTITY test IS PORT ( );
END test ;

STD_LOIC_VECTOR to INTEGER

The IEEE libraries std_logic_arith and numeric_std supports std_logic_vector to integer conversion. std_logic_arith uses the function conv_integer, while numeric_std uses the function to_integer for the conversion. In both the cases std_logic_vector should be converted into signed or unsigned before it is passed to the functions.

Example using std_logic_arith:
USE IEEE.STD_LOGIC_ARITH.all;
-- Variable decleration
variable my_vector : STD_LOGIC_VECTOR (3 downto 0) := "1111" ;
variable my_integer : integer ;
-- Conversion
my_integer := conv_integer (unsigned (my_vector)) ;

Example using numeric_std:
USE IEEE.NUMERIC_STD.all;
-- Variable decleration
variable my_vector : STD_LOGIC_VECTOR (3 downto 0) := "1111" ;
variable my_integer : integer ;
-- Conversion
my_integer := to_integer (unsigned (my_vector)) ;

An aerospace company from India

I didn't even imagine that there is a private aerospace company, which manufactures aircrafts in India. To my surprise, it is there. The company is Taneja Aerospace and Aviation Ltd.

http://www.taal.co.in/

Did You Know ?

In VHDL the following statements are one and the same.

wait until clk'event and clk = 1;
wait on clk until clk = 1;

I have encountered this wait on and wait until combination recently and found it interesting.

we could use two different signals in the wait on and wait until part as depicted below.

wait on clk until reset_n = 1;

Semiconductor Glossary

http://www.semiconductorglossary.com/

This website has more useful links at the left bottom of the page in addition to the Semiconductor Glossary.

Military and Aerospace Programmable Logic Devices (MAPLD)

This website is supported by NASA and dedicated for Military and Aerospace domain white papers. All the white papers are freely downloadable.

http://nepp.nasa.gov/mapld_2008/

DSP Directory

EDN, an electronics design magazine maintaining a list of DSPs based on their application and vendor.

http://www.edn.com/index.asp?layout=DSP&year=2009&referalid=96&industryid=48982

Archive of the popular VLSI websites & Blogs

Websites
http://www.vlsi-world.com/
http://www.asic-world.com/
http://www.asichowto.com/
http://www.fpgasimulation.com/
http://www.edn.com/fpgagurus/
http://www.freemodelfoundry.com/

Blogs
http://only-vlsi.blogspot.com/
http://chipverification.blogspot.com/
http://vlsiprojects.blogspot.com/
http://vlsifaq.blogspot.com/

I welcome the readers input to add more or delete the listed one.

Microelectronics Design Center

I have come across this web page when searching for a VHDL type conversion operation and found that it has good amout of HDL resources.

http://dz.ee.ethz.ch/support/ic/hdl/vhdlsources.en.html

Aviation news

A fantastic website to get all the latest Aviation news.

http://www.ainonline.com/